Engineering Jobs in Sunnyvale Ca Onsite

Principal System Embedded Engineer (SONiC)

Duration – 6 months to Hire

Location – San Jose CA – Hybrid / 2 days

Notes - Manager is looking for someone with SONiC community level experience & GitHub link .

Please provide a note up of 7-8 lines depending on the Community level experience when comes to SONiC

Responsibilities:

• Design, develop, and maintain features and enhancements for the SONiC NOS platform, interfacing with SAI and platform infrastructure.
• Contribute to the SONiC open-source community and stay current with the evolving SONiC ecosystem.
• Develop forwarding features on SONiC and the underlying hardware (e.g., ASICs, PHYs, optics, and other platform components).
• Implement code for critical system modules, drivers, and APIs supporting high-performance data planes and control planes.
• Debug, troubleshoot, and resolve issues on SONiC platforms.
• Participate in code reviews, and documentation efforts.
• Contribute to architecture discussions to ensure scalable and highly available SONiC integrations.
• Contribute to SONiC SAI features and platform-specific management/control modules (e.g., telemetry, diagnostics, and monitoring components).

Basic Qualifications:

• Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field.
• Minimum of 10 years of work experience is required.
• With at least 1 year of hands-on SONiC development experience is must.
• Strong experience with the SONiC network operating system and architecture.
• Demonstrated feature contributions to the SONiC open-source community.
• Experience using SONiC SAI for new feature development and integration.
• Experience with datapath forwarding features such as BFD, FIB, RIB, ERSPAN, ACLs, QoS, unicast, and multicast.
• L2/L3 Protocol Stack Development
• L3: BGP, OSPF, IS-IS, EVPN/VXLAN, MPLS, etc...
• L2: STP, LLDP, LACP, etc...
• Experience with FRR open routing stack
• Experience with Redis DB, Docker
• Experience in Data Plane/Embedded software development/kernel drivers.
• Proficient in Python, C/C++.
• Familiarity with Linux internals and containerized environment.
• Excellent problem-solving skills and ability to work in a fast-paced, collaborative environment.
• Knowledge of network ASICs (e.g., Broadcom, Marvell) and switch hardware architecture.

Additional Skills:

Cloud Architectures, Cross Domain Knowledge, Design Thinking, Development Fundamentals, DevOps, Distributed Computing, Microservices Fluency, Full Stack Development, Security-First Mindset, Solutions Design, Testing & Automation, User Experience (UX)

A well-funded startup with strong enterprise traction is building a category-defining AI workbench to accelerate enterprise AI adoption.

The platform ingests messy, real workflows, automates them end-to-end, and continuously learns from human decision-making. This is a customer-focused, hands-on engineering role centred on shipping reliable, production-ready AI systems.

As a Customer facing Full stack Engineer, you'll partner with customers, product, and engineering to build and scale AI directly within enterprise workflows.

What You'll Do

• Build and deploy AI-powered features across frontend, backend, and platform

• Implement LLM systems including RAG, embeddings, agents, and document processing

• Rapidly prototype using real customer data and iterate quickly

• Ship user-facing AI with strong guardrails, reliability, and UX

• Optimize for performance, latency, safety, and scale

• Contribute to architecture, testing, and production readiness

• Develop reusable platform components and prompt frameworks

What You Bring

• BS required, Master's preferred

• Experience in a Forward Deployed Engineering role

• Proven track record deploying AI systems into production

• Strong hands-on experience with LLMs and RAG

• Solid software engineering fundamentals

• Comfort in 0 to 1, early-stage environments

• Familiarity with enterprise workflows and unstructured data

Compensation

• Up to $350,000 total comp

• Strong bonus

• Competitive equity

• Hybrid, 3 days onsite in Palo Alto

You'll help transform fragmented enterprise workflows into a continuously improving AI platform, shaping a product already seeing strong demand.

HCLTech is looking for a highly talented and self- motivated Mechanical Design Lead / Manager to join it in advancing the technological world through innovation and creativity.

Job Title: Mechanical Design Lead / Manager

Job ID:

Position Type: Full-time with HCLTech

Location: San Jose, CA

Role/Responsibilities

• Bachelor's degree in mechanical engineering or equivalent and 8-12 years of EMS design experience
• 8+ years of relevant experience in design of compute/network products
• Expertise in use of 3D MCAD tools (Creo/NX)
• Experience in performing static and dynamic analysis using tools such as Creo Simulate or ANSYS
• Expert in tolerance analysis, Geometric Dimensioning and Tolerancing (GD&T), and statistical analysis
• Experience designing sheet metal for high volume production
• Strong analytical and problem-solving skills
• Strong knowledge and understanding of GD&T principles and tolerance analysis
• Demonstrated leadership skills
• Design and deliver next generation chassis and cards that meet system product requirements
• Perform detailed 2D tolerance analysis for complex electro-mechanical assemblies using spreadsheets and/or 3D tolerance analysis tools such as CETol
• Design and develop innovative mechanical solutions using sheet metal, plastic, and die-cast that meet EMI, safety, and compliance requirements
• Develop 3D CAD models using Creo or NX
• Create detailed drawings by applying Geometric Tolerancing and Dimensioning (GD&T) principles
• Lead resolution of issues by working closely with manufacturing teams and suppliers, developing mitigation plans, and keeping management informed
• Collaborate with cross-functional teams (HW, SI, CAD, Thermal, Manufacturing, etc.) to negotiate requirements and evaluate technical risks and tradeoffs
• Collaborate with thermal engineers to design and implement cooling solutions
• Provide technical design guidance and mentoring for junior engineers

Pay and Benefits

Pay Range Minimum: $51.50 per hour

Pay Range Maximum: $57.34 per hour

HCL is an equal opportunity employer, committed to providing equal employment opportunities to all applicants and employees regardless of race, religion, sex, color, age, national origin, pregnancy, sexual orientation, physical disability or genetic information, military or veteran status, or any other protected classification, in accordance with federal, state, and/or local law. Should any applicant have concerns about discrimination in the hiring process, they should provide a detailed report of those concerns to for investigation.

Compensation and Benefits

A candidate's pay within the range will depend on their work location, skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program; 401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year.

How You'll Grow

At HCLTech, we offer continuous opportunities for you to find your spark and grow with us. We want you to be happy and satisfied with your role and to really learn what type of work sparks your brilliance the best. Throughout your time with us, we offer transparent communication with senior-level employees, learning and career development programs at every level, and opportunities to experiment in different roles or even pivot industries. We believe that you should be in control of your career with unlimited opportunities to find the role that fits you best.

We're working with a fast growing AI startup in SF that's hiring a Forward Deployed Engineer to help identify and build high-impact solutions across the business.

This isn't a typical engineering role.

You'll be embedded directly with teams across sales, operations, and customer experience, spotting inefficiencies and quickly building AI tools, automations, and systems to solve them.

The focus is on impact, not perfection.

What makes it interesting is the environment:

• High ownership and real business impact

• Working across multiple functions, not just engineering

• Rapid build and ship cycles where ideas go live in days

• Constant exposure to the latest AI tools and capabilities

• 14 hour days in a high-intensity environment where you move fast and see results immediately

They're looking for people who:

• Are strong technical generalists (Python, TypeScript, SQL)

• Think in terms of business outcomes, not just code

• Are comfortable building quickly and iterating in real time

• Can communicate clearly with non-technical stakeholders

• Want to work at the intersection of AI and real-world operations

SF based, in office

$140K to $200K + bonus + equity

If this sounds interesting, feel free to message me or get in touch.

One of the world's largest vehicle manufacturers is searching for a Principal Infotainment Systems Engineer to join their advanced hardware platform team onsite in Mountain View, CA. In this pivotal role, you'll drive the design, integration, and validation of next-generation infotainment ECU systems impacting the user experience in millions of vehicles worldwide. If you thrive in technically complex environments, love tackling large-scale system challenges, and want to play a key role in shaping the future of in-vehicle technology, this may be your next career step!

Responsibilities

• Lead the end-to-end system execution of embedded infotainment ECUs, overseeing feature development, systems integration, validation, and delivery timelines.
• Guide teams in defining requirements, building performance models, and validating feature implementation to ensure a premium user experience and regulatory compliance.
• Collaborate closely with hardware and board engineering groups to optimize architecture for power, interface compatibility, audio/video pipelines, and system performance.
• Coordinate the development and review of schematics and PCBs, track thermal and EMI risks, and manage hardware validation across multiple development builds.
• Spearhead the integration of ECUs into vehicle networks, planning and executing system-level and in-vehicle testing, and ensuring timely resolution of issues.
• Partner with SoC and software teams on silicon selection, bootloader and operating system integration, and system stability improvements.
• Interface regularly with suppliers, contract manufacturers, and cross-functional teams, ensuring that all deliverables meet requirements and acceptance criteria.
• Drive alignment between engineering, HMI, cloud, and connectivity teams, supporting cross-domain initiatives.
• Proactively address system ambiguity, triage hardware/software issues, and escalate risks to drive to closure with all partners.

Skills & Experience

• Bachelor's degree (or higher) in Electrical Engineering, Computer Engineering, Computer Science, Mechatronics, or related discipline required; Master's preferred.
• At least 12 years' experience driving complex systems engineering initiatives, especially for embedded infotainment ECUs, with expertise in SoC, hardware, and vehicle integration.
• Demonstrated ability to architect, integrate, and validate high-performance systems spanning processor, board, and vehicle domains.
• Proficient background in ARM SoC platforms, memory and storage subsystems, peripheral interfaces such as PCIe and USB, and multimedia (audio/display) pipelines.
• Hands-on skills with embedded Linux/RTOS, bootloaders, board-level bring-up, schematic/layout review, and cross-domain debugging.
• Extensive knowledge of automotive communication networks (CAN, LIN, Automotive Ethernet) and experience leading cross-functional validation efforts.
• Strong analytical, problem-solving, influencing, and communication abilities; adept at navigating organizational complexities and driving clarity and execution across teams.
• Experience in strategies for system safety, with preferred exposure to ISO 26262 and cybersecurity standards.
• Familiarity with Android Automotive, QNX, OTA update management, and infotainment stack optimization is a plus.
• Self-motivated, highly accountable, thrives under ambiguity, and skilled in coordinating deliverables across multiple partners.
• Willingness to travel occasionally (less than 15% of the time).

Position: DFT Engineer

Location: San Jose, CA (Remote)

Experience: 8+ Years

Job Description:

What You'll Be Doing:

Develop and implement comprehensive DFT architectures tailored to specific design requirements.

Design and implement robust DFT infrastructure, including scan chains, BIST, and other test mechanisms.

Generate high-quality test vectors and analyze DFT coverage to ensure thorough fault detection.

Verify test patterns using gate-level simulations to identify and address any functional issues

Collaborate closely with STA, physical design, and power engineers to debug and resolve

DFT-related problems.

Work in partnership with test engineers to bring up test vectors on silicon and ensure

successful testing.

What We Are Looking For:

Strong understanding of industry standards and best practices in DFT, ATPG, JTAG, and MBIST.

Proven experience in developing DFT specifications and architectures for complex designs.

Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more.

Proficiency in Cadence tools like Modus and Genus for DFT implementation, vector generation,

and verification.

Ability to conduct experiments during silicon debug, effectively gather and analyze data to identify root causes.

Efficient scripting skills using TCL for automating tasks and developing custom flows.

Education:

Bachelor's / Masters

What's In It for You:

At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package.

• Medical, Dental, Vision Insurance
• 401k, With Matching Contributions
• Short-Term/Long-Term Disability Insurance
• Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
• Paid Time Off (including sick, holiday, vacation, etc.)
• Tuition Reimbursement
• Growth Opportunities
• And more!

Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: San Jose CA (Remote)

About eInfochips

eInfochips, an Arrow company (Fortune #154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's

$33B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit for our portfolio of product engineering services across various industries C verticals.

EEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.

Job Title: Technical Program Manager III – PDE (Hardware)

Location: Sunnyvale, CA or Redmond, WA (preferred)

Duration: 12 Months to start with potential extensions (W2 Contract)

We are seeking an experienced Technical Program Manager (TPM III) to support Product Design Engineering (PDE) programs for next-generation consumer hardware products. This role will lead complex, cross-functional hardware development programs from early concept through qualification and mass production.

You will work closely with engineering, product, architecture, industrial design, and operations teams, as well as external vendors, to ensure timely and high-quality delivery of hardware modules.

Must-Have:

Hands-on experience managing hardware development programs

Strong understanding of mechanical design, manufacturing, and qualification

Proven vendor management experience (including flexible hours and travel)

Ability to translate technical complexity into clear program execution

Nice-to-Have

Mandarin language skills

AR/VR, wearables, or consumer electronics background

Experience:

5–8 years as a TPM supporting PDE or hardware engineering teams

Comfortable driving ambiguity in early-stage product development

Responsibilities:

Drive investigation, definition, and delivery of next-generation hardware modules

Develop and manage end-to-end development, delivery, and qualification schedules

Own phase-gate execution from concept through mass production

Lead cross-functional collaboration across engineering, product, ID, operations, and vendors

Manage internal and external communication, including vendor coordination across time zones

Set milestones, track risks, and proactively resolve program issues

Drive engineering teams to closure on technical challenges

Manage engineering builds from early prototypes through qualification

Ensure program documentation is complete, current, and leadership-ready

Support resource planning and budget management

Travel up to 20% as required for program execution

Required Qualifications

BS in Engineering or equivalent practical experience

5–8+ years of experience managing hardware/PDE programs from concept to mass production

Strong background in mechanical engineering and manufacturing processes

Experience working with external vendors and global supply chains

Proven ability to manage complex schedules, risks, and dependencies

Excellent communication and stakeholder management skills

Nice-to-Have

Mandarin language proficiency (strongly preferred)

Experience in consumer electronics, AR/VR, or wearable devices

Job Title: Senior Optical Interconnect Engineer

Job Location: Irvine, CA or San Jose, CA

Foxconn Interconnect Technology is seeking a Senior Optical Interconnect Engineer who are highly skilled Optical Backplane Connector Engineer to lead the development of next-generation optical interconnect solutions for high-performance computing and data center systems. This role combines deep technical expertise with system architecture insight, market awareness, and customer engagement.

Experience Preferred:

• Experience: 8–12+ years in optical connector/interconnect design, with demonstrated expertise in optical backplane architectures.
• Proven track record of delivering optical interconnect solutions from concept through production.
• Strong knowledge of optical physics, high-speed signal integrity, fiber management, and connector mechanical design.
• Familiarity with industry standards (IEEE, OIF, IEC, PCIe, etc.) relevant to optical and high-speed connectors.
• Experience with system-level architecture trade-offs, including electrical/optical co-design, thermal modeling, and reliability analysis.
• Proficient in optical design and simulation software such as Zemax, Trace Pro, Ansys, and SolidWorks.
• Customer-facing experience: ability to engage with key accounts, gather requirements, and present technical roadmaps.
• Marketing awareness: capability to benchmark competitors, identify market gaps, and align R&D to business opportunities.
• Excellent communication and presentation skills for both technical and executive-level audiences.

Education: MS or PhD in Electrical Engineering, Optical Engineering, Photonics, or related field.

About Foxconn Interconnect Technology: Interconnect Technology, Inc. ("FIT") focuses on the development, manufacturing and marketing of electronic and optoelectronic connectors, antennas, acoustic components, cables and modules for applications in computers, communication equipment, consumer electronics, automobiles, industrial and green energy field products.

We offer our employees competitive compensation and world class benefits. In addition, we recognize the performance of the company, business unit and individual through our incentive and recognition programs. FIT is an equal opportunity employer Minorities/Females/Protected Veterans/Disabled.

Summary:

HCLTech is looking for a highly talented, self-motivated and Experienced PLC Engineer to join it in advancing the technological world through innovation and creativity.

Job Title: Electrical PLC Engineer

Job ID: 1543025BR

Position Type: Fulltime

Location: Milpitas, CA

Key Skills & Experiences required :

• Experience in control systems and Safety interlock circuits.
• Expert in Siemens PLC program development
• Hands on experience in component selection (Cables, wire, connectors and harnesses accessories)
• Experience in Power budget and load calculation and Electrical component selection
• Semi experience in Harnesses design for PDU, Racks, Process equipment's
• Hands on experience in electrical schematic design and system level interconnect diagram design
• Knowledge on the thermal test and power measurement
• Material procurement and Design Validation
• Capable to understand the high-level system requirement and providing workable solution
• Good knowledge in compliance NFPA, CE, SEMI S2, S8
• Knowledge of Clean room and SEMI standards is an added advantage.
• Aspire to own complete product cable harness, PDU design ownership and installation

Education & Experience

• Bachelor's degree in electrical, Electronics, Mechatronics, or related field.
• Minimum 5+ years of relevant experience in Electrical Engineering

Pay and Benefits

Pay Range Minimum: $68000 per year

Pay Range Maximum: $110000 per year

HCLTech is an equal opportunity employer, committed to providing equal employment opportunities to all applicants and employees regardless of race, religion, sex, color, age, national origin, pregnancy, sexual orientation, physical disability or genetic information, military or veteran status, or any other protected classification, in accordance with federal, state, and/or local law. Should any applicant have concerns about discrimination in the hiring process, they should provide a detailed report of those concerns to for investigation.

Compensation and Benefits

A candidate's pay within the range will depend on their work location, skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program; 401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year.

How You'll Grow

At HCLTech, we offer continuous opportunities for you to find your spark and grow with us. We want you to be happy and satisfied with your role and to really learn what type of work sparks your brilliance the best. Throughout your time with us, we offer transparent communication with senior-level employees, learning and career development programs at every level, and opportunities to experiment in different roles or even pivot industries. We believe that you should be in control of your career with unlimited opportunities to find the role that fits you best.

SBT is the exclusive retained recruiting firm for this position.

Company Overview

This confidential startup is a well-funded early-stage semiconductor company focused on advancing AI-driven design to address emerging challenges in the artificial intelligence ecosystem. The company is developing innovative technologies that leverage automation and machine learning to accelerate the design and development of complex analog semiconductor solutions. By applying AI to traditionally manual and time-intensive design processes, the organization aims to unlock faster innovation cycles and enable the next generation of AI hardware infrastructure.

Job Role

• Design and implement digital control logic for power management ICs
• Work closely with analog engineering teams to ensure effective integration between digital control blocks and analog power circuitry
• Develop high-quality, power-efficient RTL using Verilog or SystemVerilog to support key features
• Contribute to product readiness for manufacturing by supporting design-for-test methodologies
• Create and execute comprehensive verification strategies, including mixed-signal simulations and behavioral modeling

Qualifications

• BS or MS degree in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of experience in digital IC design, including significant experience developing solutions for mixed-signal or power management semiconductor products.
• Strong proficiency in RTL development using Verilog or SystemVerilog for synthesizable digital design.
• Hands-on experience designing digital control logic for power conversion systems, including control loops used in power management or DC-DC converter applications.