Engineering Journal Jobs in Campbell

NO H1B Transfer/Sponsor

Role: PCIe Verification Engineer

Position Type: Contract

Location: San Jose, CA Or Silver Lake, CO ( Day One Onsite)

NO H1B Transfer/Sponsor

Job Description:

Experience: 7+ Years Education: Bachelor/Master of Engineering (B.E./B.Tech/MS) in Electronics, Electrical, Computer Engineering, or a related field

Role Summary:

Drive the pre-silicon verification of next-generation PCIe Switch and Retimer designs across Gen4, Gen5, and Gen6 specifications. Utilizing SystemVerilog and UVM, you will ensure robust protocol compliance, high-performance throughput, and seamless interoperability for cutting-edge silicon.

Key Responsibilities:

• Strategic Planning: Architect and execute comprehensive PCIe verification plans to ensure full specification coverage.
• Environment Development: Build and maintain sophisticated, UVM-based verification environments from the ground up.
• Protocol Deep-Dive: Verify intricate PCIe protocol behaviors, including LTSSM transitions, link training flows, and complex error handling mechanisms.
• Feature Validation: Validate specialized Switch and Retimer features alongside cross-vendor interoperability.
• RTL Debugging: Perform rigorous debug of RTL and protocol-level issues while conducting detailed functional and code coverage analysis.

Required Skills:

• Protocol Expertise: Strong command of PCIe protocols, specifically Gen4 and Gen5, with Gen6 knowledge considered a significant advantage.
• Methodology: Advanced proficiency in SystemVerilog, UVM, and the implementation of functional assertions.
• Tooling: Extensive experience navigating industry-standard simulators such as VCS, Questa, or Xcelium.

NO H1B Transfer/Sponsor

Eximietas Design is a leading technology consulting and solutions development firm specialising in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants. With a commitment to innovation and excellence, we deliver cutting-edge solutions that empower businesses to thrive in the ever-evolving digital landscape.

Location: Bay Area, CA

Employment Type: Full-Time

Minimum Qualifications:

● Bachelor’s degree in computer science or electrical/Electronics Engineering

● Over 10 years of experience in Design Verification

● Strong understanding of design concepts and ASIC verification flow

● Proven experience in IP, Subsystem, and SoC verification

● Hands-on expertise with high-speed protocols and their controllers (PCIe/USB/DDR/ Ethernet/MIPI/UFS)

● Proficient in System Verilog and UVM coding

● Solid understanding of RAL (Register Abstraction Layer)

● Practical experience integrating third-party VIPs

● Excellent problem-solving, analytical, and debugging skills

● Mandatory exposure to at least one of the following: GLS, UPF, Performance Verification, Meta stability simulation, Boot-up (C–SV/UVM) handshakes and C testcase development

● Demonstrated capability in Subsystem testbench development and SoC-level verification

● Strong knowledge of AMBA protocols including AXI, APB, and AHB

● Hands-on experience with revision control systems such as Git, SVN, or Perforce

● Experience in a team lead role with responsibilities in guiding, mentoring, and ensuring effective collaboration across teams

As a Lead verification engineer candidate will be responsible to work at IP, Subsystem or

SoC verification-related tasks.

Responsibilities:

● Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC.

● Understand design specifications and implementation to define the verification strategy.

● Create testbench micro-architecture, test plan, and coverage plan documents.

● Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness.

● Implement System Verilog assertions and functional coverage.

● Analysed code coverage and address missing scenarios to meet coverage goals.

● Work with other verification team members to develop, execute, and analyse verification test cases and sequences, providing relevant solutions to issues.

● Collaborate with architects, designers, and pre- and post-silicon verification teams to meet deadlines.

● Coordinate with customer leads, ensuring all deliverables and timelines are met.

● Serve as the project's point of contact, responsible for verification signoff.

Apply/Refer -

MatchPoint Solutions is a fast-growing, young, energetic global IT-Engineering services company with clients across the US. We provide technology solutions to various clients like Uber, Robinhood, Netflix, Airbnb, Google, Sephora, and more! More recently, we have expanded to working internationally in Canada, China, Ireland, UK, Brazil, and India. Through our culture of innovation, we inspire, build, and deliver business results, from idea to outcome. We keep our clients on the cutting edge of the latest technologies and provide solutions by using industry-specific best practices and expertise.

We are excited to be continuously expanding our team. If you are interested in this position, please send over your updated resume. We look forward to hearing from you!

Job Title: Embedded AI Engineer

Location: Sunnyvale, CA

Employment Type: 6+ Month Extendable Contract

Pay Range: USD 70-80/HR

- Role Overview/Job Responsibilities

About this opportunity – Embedded AI Engineer We are seeking an experienced Embedded AI Engineer to join our team in validating PyTorch-based Large Language Models (LLMs) using CUDA SDK APIs. The successful candidate will be responsible for debugging, extending, and replacing the underlying CUDA code to ensure seamless functionality on our company-specific AI processors.

Key Responsibilities:

● Validate PyTorch-based LLMs on company-specific AI processors using CUDA SDK APIs

● Debug and troubleshoot issues related to CUDA code integration with PyTorch models

● Extend and modify CUDA code to optimize performance on company-specific AI processors

● Replace existing CUDA code with custom implementations to meet specific requirements

● Collaborate with cross-functional teams to ensure successful integration of LLMs with company-specific AI processors

● Develop and maintain validation frameworks and tools for PyTorch-based LLMs

● Analyze and optimize the performance of LLMs on company-specific AI processors Requirements

● Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related fields

● Strong experience with CUDA programming and PyTorch framework

● In-depth knowledge of deep learning models, particularly Large Language Models (LLMs)

● Proficiency in C++ and Python programming languages

● Experience with debugging and troubleshooting complex software issues

● Excellent problem-solving skills and attention to detail

● Strong communication and collaboration skills

Nice to Have:

● Experience with AI processor architecture and design

● Knowledge of other deep learning frameworks, such as TensorFlow

MatchPoint Solutions provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.

This policy applies to all terms and conditions of employment, including recruiting, hiring, placement, promotion, termination, layoff, recall, transfer, leaves of absence, compensation, and training.

Aivres is a leading global data center and cloud computing solutions provider committed to delivering innovative technologies that propel the world's leading industries to new frontiers. We deliver and deploy robust, performance-optimized, purpose-built platforms to major data centers around the globe. As a Sr. Systems Engineer, you will play a pivotal role in the design, development, and integration of cutting-edge server systems. You will work cross-functionally with various teams to define hardware architecture, develop customized solutions, and resolve complex technical issues.

We are seeking a highly skilled and motivated Sr. System Test Engineer to play a critical role in guaranteeing the quality and performance of our server products. You will be responsible for conducting comprehensive hardware system integration testing, identifying potential issues, and recommending solutions to enhance system efficiency and reliability.

Responsibilities:

• Lead hardware system integration testing for server product development, ensuring thoroughness and accuracy.
• Design and execute customized test plans and methods tailored to specific customer needs.
• Analyze test data, identify problems, and propose effective solutions for improvement.
• Write detailed test reports and meticulously track identified issues through resolution.
• Stay at the forefront of testing technology by actively researching and implementing new methodologies and tools.
• Collaborate with cross-functional teams to ensure seamless integration and optimal system performance.

Qualifications:

• Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
• Minimum of 5 years of relevant experience in system testing, preferably with a focus on server hardware.
• Familiarity with GPU-related testing experience is a plus.
• In-depth understanding of server system software and hardware architecture, including key sever system components and their technical characteristics.
• Strong knowledge of various mainstream operating systems, installation procedures, and troubleshooting techniques.
• Proven ability to independently manage and execute testing tasks, including report writing, data analysis, and problem tracking.
• Excellent communication and collaboration skills, with the ability to work effectively in a team environment.
• Prior server testing experience and fluency in both English and Chinese are highly preferred.

Benefits:

• Competitive salary and benefits package.
• Opportunity to work on cutting-edge technology and contribute to innovative projects.
• Collaborative and supportive work environment.
• Career development and growth opportunities.

EEO Statement

Aivres is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of Aivres to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.

We're working with a fast growing AI startup in SF that's hiring a Forward Deployed Engineer to help identify and build high-impact solutions across the business.

This isn't a typical engineering role.

You'll be embedded directly with teams across sales, operations, and customer experience, spotting inefficiencies and quickly building AI tools, automations, and systems to solve them.

The focus is on impact, not perfection.

What makes it interesting is the environment:

• High ownership and real business impact

• Working across multiple functions, not just engineering

• Rapid build and ship cycles where ideas go live in days

• Constant exposure to the latest AI tools and capabilities

• 14 hour days in a high-intensity environment where you move fast and see results immediately

They're looking for people who:

• Are strong technical generalists (Python, TypeScript, SQL)

• Think in terms of business outcomes, not just code

• Are comfortable building quickly and iterating in real time

• Can communicate clearly with non-technical stakeholders

• Want to work at the intersection of AI and real-world operations

SF based, in office

$140K to $200K + bonus + equity

If this sounds interesting, feel free to message me or get in touch.

Position: DFT Engineer

Location: San Jose, CA (Remote)

Experience: 8+ Years

Job Description:

What You'll Be Doing:

Develop and implement comprehensive DFT architectures tailored to specific design requirements.

Design and implement robust DFT infrastructure, including scan chains, BIST, and other test mechanisms.

Generate high-quality test vectors and analyze DFT coverage to ensure thorough fault detection.

Verify test patterns using gate-level simulations to identify and address any functional issues

Collaborate closely with STA, physical design, and power engineers to debug and resolve

DFT-related problems.

Work in partnership with test engineers to bring up test vectors on silicon and ensure

successful testing.

What We Are Looking For:

Strong understanding of industry standards and best practices in DFT, ATPG, JTAG, and MBIST.

Proven experience in developing DFT specifications and architectures for complex designs.

Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more.

Proficiency in Cadence tools like Modus and Genus for DFT implementation, vector generation,

and verification.

Ability to conduct experiments during silicon debug, effectively gather and analyze data to identify root causes.

Efficient scripting skills using TCL for automating tasks and developing custom flows.

Education:

Bachelor's / Masters

What's In It for You:

At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package.

• Medical, Dental, Vision Insurance
• 401k, With Matching Contributions
• Short-Term/Long-Term Disability Insurance
• Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
• Paid Time Off (including sick, holiday, vacation, etc.)
• Tuition Reimbursement
• Growth Opportunities
• And more!

Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: San Jose CA (Remote)

About eInfochips

eInfochips, an Arrow company (Fortune #154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's

$33B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit for our portfolio of product engineering services across various industries C verticals.

EEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.

Job Title: Senior Optical Interconnect Engineer

Job Location: Irvine, CA or San Jose, CA

Foxconn Interconnect Technology is seeking a Senior Optical Interconnect Engineer who are highly skilled Optical Backplane Connector Engineer to lead the development of next-generation optical interconnect solutions for high-performance computing and data center systems. This role combines deep technical expertise with system architecture insight, market awareness, and customer engagement.

Experience Preferred:

• Experience: 8–12+ years in optical connector/interconnect design, with demonstrated expertise in optical backplane architectures.
• Proven track record of delivering optical interconnect solutions from concept through production.
• Strong knowledge of optical physics, high-speed signal integrity, fiber management, and connector mechanical design.
• Familiarity with industry standards (IEEE, OIF, IEC, PCIe, etc.) relevant to optical and high-speed connectors.
• Experience with system-level architecture trade-offs, including electrical/optical co-design, thermal modeling, and reliability analysis.
• Proficient in optical design and simulation software such as Zemax, Trace Pro, Ansys, and SolidWorks.
• Customer-facing experience: ability to engage with key accounts, gather requirements, and present technical roadmaps.
• Marketing awareness: capability to benchmark competitors, identify market gaps, and align R&D to business opportunities.
• Excellent communication and presentation skills for both technical and executive-level audiences.

Education: MS or PhD in Electrical Engineering, Optical Engineering, Photonics, or related field.

About Foxconn Interconnect Technology: Interconnect Technology, Inc. ("FIT") focuses on the development, manufacturing and marketing of electronic and optoelectronic connectors, antennas, acoustic components, cables and modules for applications in computers, communication equipment, consumer electronics, automobiles, industrial and green energy field products.

We offer our employees competitive compensation and world class benefits. In addition, we recognize the performance of the company, business unit and individual through our incentive and recognition programs. FIT is an equal opportunity employer Minorities/Females/Protected Veterans/Disabled.

System Integration Test Lead

Summary:

We are seeking a Technical Program Manager (TPM) with system-level experience to tackle new challenges and leverage your expertise in this dynamic role. This company offers a fast-faced, innovate culture with abundant information, requiring you to quickly process and develop clear plans to resolve issue efficiently.

Be part of a leading consumer technology company and make a significant impact by leading programs and driving manufacturing test readiness!

Responsibilities :

• Oversee the preparation and execution of test readiness activities, including managing the transition from Surface-Mount Technology (SMT) to final assembly across all phases of product New Product Introduction (NPI) development.
• Plan, execute, and complete dry runs to ensure manufacturing test readiness for NPI builds, identifying potential issues before full production.
• Quickly identify, troubleshoot, and resolve any test-related issues that arise during the build process, ensuring minimal disruption and maintaining timelines
• Create and implement strategic plans for addressing problems, ensuring timely and effective solutions.
• Work closely with engineering, manufacturing, and other cross-functional teams to ensure seamless communication and alignment on project goals and deliverables
• Regularly track and report on the status of test progress, readiness, and outcomes, ensuring transparency and accountability throughout the project lifecycle
• Continuously refine and improve test processes and methodologies to enhance quality, efficiency, and product maturity, ensuring compliance with industry standards and best practices
• Ensure product test quality standard and manufacturing criteria are met

Requirements

• Proven experience in program management or test readiness at the system level, with a strong background in hardware and software integration
• Understanding of HW/SW architecture and interoperability of a complex systems
• Strong analytical and problem-solving skills, with the ability to thrive in a fast-paced environment
• Excellent communication and organizational skills, with the ability to articulate complex issues clearly
• Knowledge and experience in New Product Introduction (NPI) for consumer products, enabling efficient issue resolution and build execution
• Experience in consumer product manufacturing tests and hardware/software integration is a plus
• Engineering degree in ME, CE, EE or Physical Sciences prefer

Location: Cupertino, CA (Hybrid, Tuesdays - Thursdays Onsite)

Duration: 12-36+ Months

Pate Rate Range: $70/hr - $80/hr (DOE)

About the Company

Atomus’ mission is to provide world-class cybersecurity for the world’s most critical organizations. We build security compliance software delivered as managed services sold directly, with relevant professional services and support. Our commercial customers include hypersonic aircraft companies, satellite and space mission systems companies, AI and software companies, among many others serving primarily the aerospace and defense industry. At Atomus we are hardworking, we move fast, and we put our customers first.

About the Role

As a Business Operations Intern, you’ll play a key role in keeping our fast-moving team running smoothly—from coordinating product shipments and managing our Shopify store to planning team events and supporting the cofounders on strategic projects. We’re looking for someone who moves quickly, leans on AI tools to work smarter, and has a sharp eye for design and detail. This is a hands-on role where you’ll gain real experience across every facet of a growing cybersecurity startup.

Responsibilities

• Coordinate and manage physical shipments of security products to customers, including tracking orders, preparing packages, and communicating delivery timelines
• Help manage and maintain the company’s Shopify store, including inventory tracking, product listings, and order fulfillment
• Plan and coordinate team events and travel logistics
• Support the cofounders on a variety of strategic and operational projects as priorities evolve
• Manage office supply and snack ordering to keep the team well-stocked and happy
• Leverage AI tools and agents (e.g., Claude, ChatGPT, automation platforms) to streamline workflows and increase efficiency across tasks

Qualifications

• Currently enrolled in a Bachelor’s or Associate’s degree program at a Bay Area college or university, ideally pursuing a technical degree (e.g., Computer Science, Engineering, Information Systems, Business Analytics)
• Demonstrated proficiency with AI tools and a strong preference for using AI agents (e.g., Claude, Lovable) to get work done faster
• A good eye for design—whether it’s formatting a document, laying out a slide deck, or organizing a storefront
• Strong organizational skills and attention to detail
• Excellent written and verbal communication skills
• Comfortable managing logistics and coordinating shipments or deliveries
• Thrives in a fast-paced environment and can juggle multiple priorities with minimal direction
• Reliable, self-motivated, and able to work independently
• Ability to work in-office in downtown San Francisco 10–20 hours per week

Preferred Skills

• Interest in cybersecurity, technology, or the startup ecosystem
• Experience with Lovable or similar AI-powered app building tools
• Experience with Shopify or other e-commerce platforms
• Experience coordinating events, travel, or conference logistics
• Previous experience with shipping, logistics, or inventory management
• Familiarity with project management tools (e.g., Asana, Trello, Notion)
• Familiarity with design tools (e.g., Canva, Figma) for light creative tasks
• Previous internship or work experience in an office or operations role

Pay range and compensation package

Competitive hourly pay. Flexible scheduling around your class schedule (10–20 hours/week). Mentorship and hands-on exposure to multiple areas of a growing cybersecurity company. A collaborative, supportive team culture in a downtown San Francisco office.

Principal System Embedded Engineer (SONiC)

Duration – 6 months to Hire

Location – San Jose CA – Hybrid / 2 days

Notes - Manager is looking for someone with SONiC community level experience & GitHub link .

Please provide a note up of 7-8 lines depending on the Community level experience when comes to SONiC

Responsibilities:

• Design, develop, and maintain features and enhancements for the SONiC NOS platform, interfacing with SAI and platform infrastructure.
• Contribute to the SONiC open-source community and stay current with the evolving SONiC ecosystem.
• Develop forwarding features on SONiC and the underlying hardware (e.g., ASICs, PHYs, optics, and other platform components).
• Implement code for critical system modules, drivers, and APIs supporting high-performance data planes and control planes.
• Debug, troubleshoot, and resolve issues on SONiC platforms.
• Participate in code reviews, and documentation efforts.
• Contribute to architecture discussions to ensure scalable and highly available SONiC integrations.
• Contribute to SONiC SAI features and platform-specific management/control modules (e.g., telemetry, diagnostics, and monitoring components).

Basic Qualifications:

• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related field.
• Minimum of 10 years of work experience is required.
• With at least 1 year of hands-on SONiC development experience is must.
• Strong experience with the SONiC network operating system and architecture.
• Demonstrated feature contributions to the SONiC open-source community.
• Experience using SONiC SAI for new feature development and integration.
• Experience with datapath forwarding features such as BFD, FIB, RIB, ERSPAN, ACLs, QoS, unicast, and multicast.
• L2/L3 Protocol Stack Development
• L3: BGP, OSPF, IS-IS, EVPN/VXLAN, MPLS, etc…
• L2: STP, LLDP, LACP, etc…
• Experience with FRR open routing stack
• Experience with Redis DB, Docker
• Experience in Data Plane/Embedded software development/kernel drivers.
• Proficient in Python, C/C++.
• Familiarity with Linux internals and containerized environment.
• Excellent problem-solving skills and ability to work in a fast-paced, collaborative environment.
• Knowledge of network ASICs (e.g., Broadcom, Marvell) and switch hardware architecture.

Additional Skills:

Cloud Architectures, Cross Domain Knowledge, Design Thinking, Development Fundamentals, DevOps, Distributed Computing, Microservices Fluency, Full Stack Development, Security-First Mindset, Solutions Design, Testing & Automation, User Experience (UX)